Design-Reuse

Design and FPGA Implementation of an Interpolative Neural Network for Digital Image Zooming

In this paper, the VLSI implementation of a novel image interpolator for the real-time applications is presented. It is based on Probabilistic Neural Network (PNN) that adjusts automatically the ...
Design-Reuse

A Real-Time Image Processing with a Compact FPGA-Based Architecture

In this paper we present a filed programmable gate array implementation of a real time video smoothing algorithm. In comparison with smoothing video techniques like deblocking filters in H.264 or ...
EDN

Treck Releases High Performance TCP/IP Stack Implementation for the Xilinx Spartan-6 FPGA Embedded Platform

CINCINNATI, Feb. 8 /PRNewswire/ — Treck, a leading provider of embedded Internet protocols, has announced the availability of their new high performance networking reference design for the Xilinx ...
Seeking Alpha

AMD Extends Market-Leading FPGA Portfolio with AMD Spartan UltraScale+ Family Built for Cost-Sensitive Edge Applications

— New FPGAs offer high I/O counts, power efficiency, and state-of-the-art security features for embedded vision, healthcare, industrial networking, robotics, and video applications — “For over 25 ...
Yahoo Finance

AMD Extends Market-Leading FPGA Portfolio with AMD Spartan UltraScale+ Family Built for Cost-Sensitive Edge Applications

SANTA CLARA, Calif., March 05, 2024 (GLOBE NEWSWIRE) -- AMD (NASDAQ: AMD) today announced the AMD Spartan™ UltraScale+™ FPGA family, the newest addition to the extensive portfolio of AMD ...