Semiconductor Engineering

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat ...
Semiconductor Engineering

Comparisons of HW Versus SW Implementation of Warp Level Features in Vortex RISC-V GPU (Georgia Tech, IIT)

A new technical paper titled “Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU” was published by researchers at Georgia Tech and Indian Institute of Technology Bombay. ...
Electronic Design

RISC-V RVA23—A Major Milestone

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...
EDN

The next RISC-V processor frontier: AI

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...
csis.org

What RISC-V Means for the Future of Chip Development

Many believe that the future of chip design—and the development of new technologies like next-generation artificial intelligence (AI)—will depend on RISC-V architecture. RISC-V is an open standard ...